Design a NMOS and PMOS transistor circuit using virtuoso cadence and plot I-V characteristics of PMOS and NMOS for different gate and drain voltages

Author
chaitanya
License
Creative Commons CC BY 4.0
Abstract

In this project we simulate NMOS and PMOS transistor circuit in cadence virtusso tool and the I/V characteristics of PMOS and NMOS are observed

Design a NMOS and PMOS transistor circuit using virtuoso cadence and plot I-V characteristics of PMOS and NMOS for different gate and drain voltages